SEQUENCE

Sense and Readout Electronics Cryogenically Integrated for QUantun ENhanced Computation and Evolving Communication

Publications

A list of publications on web of science can be found here

 
--
 
Cryogenic MOSFET Subthreshold Current: From Resistive Networks to Percolation Transport in 1-D Systems
Catapano, E., M. Casse and G. Ghibaudo IEEE Transactions on Electron Devices. 70, 8, 4049-4054 (2023)
               
On the Zero Temperature Coefficient in Cryogenic FD-SOI MOSFETs
Catapano, E., T. M. Frutuoso, M. Casse and G. Ghibaudo IEEE Transactions on Electron Devices. 70, 3, 845-849 (2023)
               
On the Fluctuation-Dissipation of the Oxide Trapped Charge in a MOSFET Operated Down to Deep Cryogenic Temperatures
Ghibaudo, G. Fluctuation and Noise Letters. (2023)
               
The Effect of Cryogenic Temperatures on the Lateral Heat Spreading in InGaAs/InP HEMTs
Graziano, G., A. Ferraris, E. J. Cha and C. B. Zota IEEE Transactions on Electron Devices. 70, 8, 4087-4092 (2023)
               
Analytical Modeling of Source-to-Drain Tunneling Current Down to Cryogenic Temperatures
Han, H. C., H. L. Chiang, I. P. Radu and C. Enz Ieee Electron Device Letters. 44, 5, 717-720 (2023)
               
An improved subthreshold swing expression accounting for back-gate bias in FDSOI FETs
Han, H. C., F. Jazaeri, Z. X. Zhao, S. Lehmann and C. Enz Solid-State Electronics. 202,  (2023)
               
Novel Approach to FDSOI Threshold Voltage Model Validated at Cryogenic Temperatures
Han, H. C., Z. X. Zhao, S. Lehmann, E. Charbon and C. Enz Ieee Access. 11, 56951-56957 (2023)
               
Low-Power, Self-Aligned Vertical InGaAsSb NW PMOS With S < 100 mV/dec
Krishnaraja, A., Z. Y. S. Zhu, J. Svensson and L. E. Wernersson Ieee Electron Device Letters. 44, 7, 1064-1067 (2023)
               
Experimental Study of Self-Heating Effect in InGaAs HEMTs for Quantum Technologies Down to 10K
Maria, F. S. D., F. Balestra, C. Theodorou, G. Ghibaudo, C. B. Zota, E. Cha and Ieee. 61st IEEE International Reliability Physics Symposium (IRPS), Monterey, CA.(2023)
               
Self-Heating in Gate-All-Around Vertical III-V InAs/InGaAs MOSFETs
Rangasamy, G., M. S. Ram, L. O. Fhager and L. E. Wernersson Ieee Electron Device Letters. 44, 7, 1212-1215 (2023)
               
Cryogenic Characteristics of InGaAs MOSFET
Sodergren, L., P. Olausson and E. Lind IEEE Transactions on Electron Devices. 70, 3, 1226-1230 (2023)
               
Performance, Analysis, and Modeling of III-V Vertical Nanowire MOSFETs on Si at Higher Voltages
Andric, S., O. P. Kilpi, M. S. Ram, J. Svensson, E. Lind and L. E. Wernersson IEEE Transactions on Electron Devices. 69, 6, 3055-3060 (2022)
               
Lateral III-V Nanowire MOSFETs in Low-Noise Amplifier Stages
Andric, S., F. Lindelow, L. O. Fhager, E. Lind and L. E. Wernersson Ieee Transactions on Microwave Theory and Techniques. 70, 2, 1284-1291 (2022)
               
FDSOI for cryoCMOS electronics: device characterization towards compact model
Casse, M., B. C. Paz, F. Bergamaschi, G. Ghibaudo, F. Serra, G. Billiot, A. G. M. Jansen, Q. Berlingard, S. Martinie, T. Bedecarrats, L. Contamin, A. Juge, E. Vincent, P. Galy, M. A. Pavanello, M. Vinet, T. Meunier, F. Gaillard and Ieee. International Electron Devices Meeting (IEDM), San Francisco, CA.(2022)
               
Electrical characterization and modeling of FDSOI MOSFETs for Cryo-Electronics
Casse, M., B. C. Paz, G. Ghibaudo, M. Vinet and Ieee. 15th IEEE Workshop on Low Temperature Electronics (WOLTE), Matera, ITALY.(2022)
               
Modeling and simulations of FDSOI five-gate qubit MOS devices down to deep cryogenic temperatures
Catapano, E., A. Apra, M. Casse, F. Gaillard, S. de Franceschi, T. Meunier, M. Vinet and G. Ghibaudo Solid-State Electronics. 193,  (2022)
               
TCAD simulations of FDSOI devices down to deep cryogenic temperature
Catapano, E., M. Casse, F. Gaillard, S. de Franceschi, T. Meunier, M. Vinet and G. Ghibaudo Solid-State Electronics. 194,  (2022)
               
Modeling of 1D confinement in FD-SOI trigate nanowires at deep cryogenic temperatures
Catapano, E., M. Casse, F. Gaillard, T. Meunier, M. Vinet and G. Ghibaudo Solid-State Electronics. 198,  (2022)
               
Cryogenic InGaAs HEMT-Based Switches For Quantum Signal Routing
Ferraris, A., E. Cha, P. Mueller, T. Morf, M. Prathapan, M. Sousa, H. C. Han, C. Enz, C. B. Zota and Ieee. International Electron Devices Meeting (IEDM), San Francisco, CA.(2022)
               
Strained InxGa(1-x)As/InP near surface quantum wells and MOSFETs
Garigapati, N. S., L. Sodergren, P. Olausson and E. Lind Applied Physics Letters. 120, 9 (2022)
               
Modelling of self-heating effect in FDSOI and bulk MOSFETs operated in deep cryogenic conditions
Ghibaudo, G., M. Casse, F. S. D. Maria, C. Theodorou and F. Balestra Solid-State Electronics. 192,  (2022)
               
SEKV-E: Parameter Extractor of Simplified EKV I-V Model for Low-Power Analog Circuits
Han, H. C., A. D'Amico and C. Enz Ieee Open Journal of Circuits and Systems. 3, 162-167 (2022)
               
Comprehensive Design-oriented FDSOI EKV Model
Han, H. C., A. D'Amico and C. Enz. 29th International Conference on Mixed Design of Integrated Circuits and System (MIXDES), Wroclaw, POLAND.(2022)
               
Back-gate effects on DC performance and carrier transport in 22 nm FDSOI technology down to cryogenic temperatures
Han, H. C., F. Jazaeri, A. D'Amico, Z. X. Zhao, S. Lehmann, C. Kretzschmar, E. Charbon and C. Enz Solid-State Electronics. 193,  (2022)
               
Cryogenic RF Characterization and Simple Modeling of a 22 nm FDSOI Technology
Han, H. C., F. Jazaeri, A. D'Amico, Z. X. Zhao, S. Lehmann, C. Kretzschmar, E. Charbon, C. Enz and Ieee. 52nd IEEE European Solid-State Device Research Conference (ESSDERC), Milan, ITALY.(2022)
               
C-Band Low-Noise Amplifier MMIC with an Average Noise Temperature of 44.5K and 24.8mW Power Consumption
Heinz, F., F. Thome, A. Leuther, O. Ambacher and Ieee. 16th European Microwave Integrated Circuits Conference (EuMIC), London, ENGLAND.(2022)
               
A Cryogenic On-Chip Noise Measurement Procedure With +/- 1.4-K Measurement Uncertainty
Heinz, F., F. Thome, A. Leuther, O. Ambacher and Ieee. IEEE/MTT-S International Microwave Symposium (IMS), Denver, CO.(2022)
               
A Scalable Small-Signal and Noise Model for High-Electron-Mobility Transistors Working Down to Cryogenic Temperatures
Heinz, F., F. Thome, D. Schwantuschke, A. Leuther and O. Ambacher Ieee Transactions on Microwave Theory and Techniques. 70, 2, 1097-1110 (2022)
               
Detailed electrical characterization of 200 mm CMOS compatible GaN/Si HEMTs down to deep cryogenic temperatures
Kim, D., C. Theodorou, A. Chanuel, Y. Gobil, M. Charles, E. Morvan, J. W. Lee, M. Mouis and G. Ghibaudo Solid-State Electronics. 197,  (2022)
               
In-depth electrical characterization of deca-nanometer InGaAs MOSFET down to cryogenic temperatures for low-power quantum applications
Maria, F. S. D., C. Theodorou, F. Balestra, G. Ghibaudo, E. Cha, C. B. Zota and Ieee. 52nd IEEE European Solid-State Device Research Conference (ESSDERC), Milan, ITALY.(2022)
               
Low-Frequency Noise in Vertical InAs/InGaAs Gate-All-Around MOSFETs at 15 K for Cryogenic Applications
Ram, M. S., J. Svensson, S. Skog, S. Johannesson and L. E. Wernersson Ieee Electron Device Letters. 43, 12, 2033-2036 (2022)
               
Low-Temperature Characteristics of Nanowire Network Demultiplexer for Qubit Biasing
Sodergren, L., P. Olausson and E. Lind Nano Letters. 22, 10, 3884-3888 (2022)
               
Single-Mode Emission in InP Microdisks on Si Using Au Antenna
Tiwari, P., A. Fischer, M. Scherrer, D. Caimi, H. Schmid and K. E. Moselund Acs Photonics. 9, 4, 1218-1225 (2022)
               
Millimeter-Wave Vertical III-V Nanowire MOSFET Device-to-Circuit Co-Design
Andric, S., L. O. Fhager and L. E. Wernersson Ieee Transactions on Nanotechnology. 20, 434-440 (2021)
               
Design of III-V Vertical Nanowire MOSFETs for Near-Unilateral Millimeter-Wave Operation
Andric, S., L. Ohlsson-Fhager, L. E. Wernersson and Ieee. 15th European Microwave Integrated Circuits Conference (EuMIC) / 50th European Microwave Conference (EuMC), Electr Network.(2021)
               
Poisson-Schrodinger simulation and analytical modeling of inversion charge in FDSOI MOSFET down to 0 K - Towards compact modeling for cryo CMOS application
Aouad, M., T. Poiroux, S. Martinie, F. Triozon, M. Vinet and G. Ghibaudo Solid-State Electronics. 186,  (2021)
               
Generalized Boltzmann relations in semiconductors including band tails
Beckers, A., D. Beckers, F. Jazaeri, B. Parvais and C. Enz Journal of Applied Physics. 129, 4 (2021)
               
III-V-on-Si transistor technologies: Performance boosters and integration
Caimi, D., H. Schmid, T. Morf, P. Mueller, M. Sousa, K. E. Moselund and C. B. Zota Solid-State Electronics. 185,  (2021)
               
Scaled III-V-on-Si transistors for low-power logic and memory applications
Caimi, D., M. Sousa, S. Karg and C. B. Zota Japanese Journal of Applied Physics. 60, SB (2021)
               
Heterogeneous Integration of III-V Materials by Direct Wafer Bonding for High-Performance Electronics and Optoelectronics
Caimi, D., P. Tiwari, M. Sousa, K. E. Moselund and C. B. Zota IEEE Transactions on Electron Devices. 68, 7, 3149-3156 (2021)
               
On the interpretation of MOS impedance data in both series and parallel circuit topologies
Caruso, E., J. Lin, S. Monaghan, K. Cherkaoui, L. Floyd, F. Gity, P. Palestri, D. Esseni, L. Selmi and P. K. Hurley Solid-State Electronics. 185,  (2021)
               
Characterization and Lambert - W Function based modeling of FDSOI five-gate qubit MOS devices down to cryogenic temperatures
Catapano, E., A. Apra, M. Casse, F. Gaillard, S. De Franceschi, T. Meunier, M. Vinet, G. Ghibaudo and Ieee. Joint International EUROSOI Workshop / International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS), Caen, FRANCE.(2021)
               
Statistical and Electrical Modeling of FDSOI Four-Gate Qubit MOS Devices at Room Temperature
Catapano, E., G. Ghibaudo, M. Casse, T. M. Frutuoso, B. C. Paz, T. Bedecarrats, A. Apra, F. Gaillard, S. De Franceschi, T. Meunier and M. Vinet Ieee Journal of the Electron Devices Society. 9, 582-590 (2021)
               
Cryogenic Characterization and Modeling of 14 nm Bulk FinFET Technology
Chabane, A., M. Prathapan, P. Mueller, E. J. Cha, P. A. Francese, M. Kossel, T. Morf, C. Zota and Ieee. IEEE 51st European Solid-State Device Research Conference (ESSDERC), Electr Network.(2021)
               
Cryogenic Characterization and Modeling of 14 nm Bulk FinFET Technology
Chabane, A., M. Prathapan, P. Mueller, E. J. Cha, P. A. Francese, M. Kossel, T. Morf, C. Zota and Ieee. 47th IEEE European Solid State Circuits Conference (ESSCIRC), Electr Network.(2021)
               
A hybrid III-V tunnel FET and MOSFET technology platform integrated on silicon
Convertino, C., C. B. Zota, H. Schmid, D. Caimi, L. Czornomaz, A. M. Ionescu and K. E. Moselund Nature Electronics. 4, 2, 162-170 (2021)
               
On the diffusion current in a MOSFET operated down to deep cryogenic temperatures
Ghibaudo, G., M. Aouad, M. Casse, T. Poiroux and C. Theodorou Solid-State Electronics. 176,  (2021)
               
Cryogenic Characterization of 16 nm FinFET Technology for Quantum Computing
Han, H. C., F. Jazaeri, A. D'Amico, A. Baschirotto, E. Charbon, C. Enz and Ieee. 47th IEEE European Solid State Circuits Conference (ESSCIRC), Electr Network.(2021)
               
Cryogenic Characterization of 16 nm FinFET Technology for Quantum Computing
Han, H. C., F. Jazaeri, A. D'Amico, A. Baschirotto, E. Charbon, C. Enz and Ieee. IEEE 51st European Solid-State Device Research Conference (ESSDERC), Electr Network.(2021)
               
In-depth Cryogenic Characterization of 22 nm FDSOI Technology for Quantum Computation
Han, H. C., F. Jazaeri, A. D'Amico, Z. X. Zhao, S. Lehmann, C. Kretzschmar, E. Charbon, C. Enz and Ieee. Joint International EUROSOI Workshop / International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS), Caen, FRANCE.(2021)
               
A 50-nm Gate-Length Metamorphic HEMT Technology Optimized for Cryogenic Ultra-Low-Noise Operation
Heinz, F., F. Thome, A. Leuther and O. Ambacher Ieee Transactions on Microwave Theory and Techniques. 69, 8, 3896-3907 (2021)
               
Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs With a Field Plate
Kilpi, O. P., S. Andric, J. Svensson, M. S. Ram, E. Lind and L. E. Wernersson Ieee Electron Device Letters. 42, 11, 1596-1598 (2021)
               
Comprehensive Kubo-Greenwood modelling of FDSOI MOS devices down to deep cryogenic temperatures
Maria, F. S. D., L. Contamin, M. Casse, C. Theodorou, F. Balestra, G. Ghibaudo and Ieee. Joint International EUROSOI Workshop / International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS), Caen, FRANCE.(2021)
               
Lambert-W function-based parameter extraction for FDSOI MOSFETs down to deep cryogenic temperatures
Maria, F. S. D., L. Contamin, B. C. Paz, M. Casse, C. Theodorou, F. Balestra and G. Ghibaudo Solid-State Electronics. 186,  (2021)
               
Low temperature behavior of FD-SOI MOSFETs from micro- to nano-meter channel lengths
Maria, F. S. D., C. Theodorou, X. Mescot, F. Balestra, G. Ghibaudo, M. Casse and Ieee. IEEE 14th Workshop on Low Temperature Electronics (WOLTE), Electr Network.(2021)
               
Optimization of Near-Surface Quantum Well Processing
Olausson, P., L. Sodergren, M. Borg and E. Lind Physica Status Solidi a-Applications and Materials Science. 218, 7 (2021)
               
Front and back channels coupling and transport on 28 nm FD-SOI MOSFETs down to liquid-He temperature
Paz, B. C., M. Casse, S. Haendler, A. Juge, E. Vincent, P. Galy, F. Arnaud, G. Ghibaudo, M. Vinet, S. De Franceschi, T. Meunier and F. Gaillard Solid-State Electronics. 186,  (2021)
               
First Demonstration of Distributed Amplifier MMICs With More Than 300-GHz Bandwidth
Thome, F. and A. Leuther IEEE Journal of Solid-State Circuits. 56, 9, 2647-2655 (2021)
               
Poisson-Schrodinger simulation of inversion charge in FDSOI MOSFET down to 0K-Towards compact modeling for cryo CMOS application
Aouad, M., S. Martinie, F. Triozon, T. Poiroux, M. Vinet, G. Ghibaudo and Ieee. Joint International EUROSOI Workshop / International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Caen, FRANCE.(2020)
               
The Role of Oxide Traps Aligned With the Semiconductor Energy Gap in MOS Systems
Caruso, E., J. Lin, S. Monaghan, K. Cherkaoui, F. Gity, P. Palestri, D. Esseni, L. Selmi and P. K. Hurley IEEE Transactions on Electron Devices. 67, 10, 4372-4378 (2020)
               
Cryogenic Operation of Thin-Film FDSOI nMOS Transistors: The Effect of Back Bias on Drain Current and Transconductance
Casse, M., B. C. Paz, G. Ghibaudo, T. Poiroux, S. Barraud, M. Vinet, S. de Franceschi, T. Meunier and F. Gaillard IEEE Transactions on Electron Devices. 67, 11, 4636-4640 (2020)
               
Evidence of 2D intersubband scattering in thin film fully depleted silicon-on-insulator transistors operating at 4.2K
Casse, M., B. C. Paz, G. Ghibaudo, T. Poiroux, E. Vincent, P. Galy, A. Juge, F. Gaillard, S. de Franceschi, T. Meunier and M. Vinet Applied Physics Letters. 116, 24 (2020)
               
Ultra-Low Power Scaled III-V-on-Si 1T-DRAMs With Quantum Well Heterostructures
Convertino, C., L. Vergano, L. Czornomaz, C. B. Zota, S. Karg and Ieee. Joint International EUROSOI Workshop / International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Caen, FRANCE.(2020)
               
Cryo-CMOS Compact Modeling
Enz, C., A. Beckers, F. Jazaeri and Ieee. IEEE International Electron Devices Meeting (IEDM), Electr Network.(2020)
               
On the modelling of temperature dependence of subthreshold swing in MOSFETs down to cryogenic temperature
Ghibaudo, G., M. Aouad, M. Casse, S. Martinie, T. Poiroux and F. Balestra Solid-State Electronics. 170,  (2020)
               
Tuning of Source Material for InAs/InGaAsSb/GaSb ApplicationSpecific Vertical Nanowire Tunnel FETs
Krishnaraja, A., J. Svensson, E. Memisevic, Z. Y. S. Zhu, A. R. Persson, E. Lind, L. R. Wallenberg and L. E. Wernersson ACS Applied Electronic Materials. 2, 9, 2882-2887 (2020)
               
Vertical InAs/InGaAsSb/GaSb Nanowire Tunnel FETs on Si with Drain Field-Plate and EOT=1 nm Achieving S-min=32 mV/dec and g(m)/I-D=100 V-1
Krishnaraja, A., J. Svensson, L. E. Wernersson and Ieee. IEEE Silicon Nanoelectronics Workshop (SNW), Electr Network.(2020)
               
Simulation of low-noise amplifier with quantized ballistic nanowire channel
Marty, C., C. Convertino and C. Zota Semiconductor Science and Technology. 35, 11 (2020)
               
Performance and Low-Frequency Noise of 22-nm FDSOI Down to 4.2 K for Cryogenic Applications
Paz, B. C., M. Casse, C. Theodorou, G. Ghibaudo, T. Kammler, L. Pirro, M. Vinet, S. de Franceschi, T. Meunier and F. Gaillard IEEE Transactions on Electron Devices. 67, 11, 4563-4567 (2020)
               
Mobility of near surface MOVPE grown InGaAs/InP quantum wells
Soedergren, L., N. S. Garigapati, M. Borg and E. Lind Applied Physics Letters. 117, 1 (2020)
               
InGaAs MOSHEMT W-Band LNAs on Silicon and Gallium Arsenide Substrates
Thome, F., F. Heinz and A. Leuther IEEE Microwave and Wireless Components Letters. 30, 11, 1089-1092 (2020)
               
III-V Nanowire MOSFETs: RF-Properties and Applications
Wernersson, L. E. and Ieee. IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), Electr Network.(2020)